Investigation of the Layout and Optical Proximity Correction Effects to Control the Trench Etching Process on 4H-SiC
Investigation of the Layout and Optical Proximity Correction Effects to Control the Trench Etching Process on 4H-SiC
- 주제(키워드) area effect , micro-trench , 4H-SiC trench etching , loading effect , RIE lagging , OPC
- 발행기관 대한금속·재료학회
- 발행년도 2017
- 총서유형 Journal
- KCI ID ART002244889
- 본문언어 영어
초록/요약
Although trench gate and super-junction technology have micro-trenchproblems when applied to the SiC process due to the materialcharacteristics. In this paper, area effects are analyzed from the testelement group with various patterns and optical proximity correction(OPC) methods are proposed and analyzed to reduce micro-trenches inthe SiC trench etching process. First, the loading effects were analyzedfrom pattern samples with various trench widths (Wt). Fromexperiments, the area must limited under a proper size for a uniformetching profile and reduced micro-trenches because a wider areaaccelerates the etch rate. Second, the area effects were more severelyunbalanced at corner patterns because the corner pattern necessarily hasan in-corner and out-corner that have different etching areas to eachother. We can balance areas using OPC patterns to overcome this. Experiments with OPC represented improved micro-trench profilefrom when comparing differences of trench depth (Δdt) at out cornerand in corner. As a result, the area effects can be used to improve thetrench profile with optimized etching process conditions. Therefore, thetrench gate and super-junction pillar of the SiC power MOSFET canhave an improved uniform profile without micro-trenches using properdesign and OPC.
more