Plasma Etch Damage가 (100) SOI에 미치는 영향의 C-V 특성 분석 : C-V Characterization of Plasma Etch-damage Effect on (100) SOI
C-V Characterization of Plasma Etch-damage Effect on (100) SOI
- 주제(키워드) MOS , Plasma-induced etch damage , Interface states , Capacitance , Silvaco Atals
- 발행기관 한국전기전자재료학회
- 발행년도 2008
- 총서유형 Journal
- UCI G704-000026.2008.21.8.010
- KCI ID ART001268506
- 본문언어 한국어
초록/요약
Metal-oxide-semiconductor (MOS) capacitors were fabricated to investigate the plasma damage caused by reactive ion etching (RIE) on (100) oriented silicon-on-insulator (SOI) substrates. The thickness of the top-gate oxide, SOI, and buried oxide layers were 10 nm, 50 nm, and 100 nm, respectively. The MOS/SOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching. The measured C-V curves were compared to the numerical results from corresponding 2-dimensional (2-D) structures by using a Silvaco Atlas simulator.
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