A low-power cache with successive tag comparison algorithm : A low-power cache with successive tag comparison algorithm
A low-power cache with successive tag comparison algorithm
- 주제(키워드) Successive tag algorithm , Cache , Low power consumption
- 발행기관 한국물리학회
- 발행년도 2005
- 총서유형 Journal
- UCI G704-001115.2005.5.3.003
- KCI ID ART001213464
- 본문언어 영어
초록/요약
In recent years, power consumption has become one of the most critical design concerns in designing VLSI systems. Thereduction of power consumption is inevitably required by the emergence of highly ecient and fast systems, which include CPU(central processor unit), MCU (micro controller unit), cache, et cetera. This paper introduces a new low-power cache controller withsuccessive tag comparison algorithm. Using these methods, the power consumption of a cache can be reduced. Simulation resultsshow that the power consumption of a cache using the proposed method is reduced by 42% compared with conventional methods..
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