A 4-Gbps/pin transceiver with a multi-level simultaneous bi-directional scheme for serial link applications
A 4-Gbps/pin transceiver with a multi-level simultaneous bi-directional scheme for serial link applications
- 주제(키워드) Transceiver , Simultaneous bi-directional , Serial link
- 발행기관 한국물리학회
- 발행년도 2004
- 총서유형 Journal
- UCI G704-001115.2004.4.1.012
- KCI ID ART000939056
- 본문언어 영어
초록/요약
This paper presents a simultaneous 4-level bi-directional transceiver, which performs data rate of eight times of the clock ratewithout the need of a high-speed clock generator. The proposed transceiver was fabricated using a 0.11l m CMOS process in900· 300 l m2 and performs data rate of 4 Gbps/pin with the use of a 500 MHz clock. The main features of the I/O interfacecircuit are 4-level pushpull linear output drivers, multi-level auto-impedance control, hierarchical multi-reference selected sam-pling, a self-biased wide common-mode range dierential amplier and an impedance-controlled reference voltage generator. Thetransceiver performs data rate of 4 Gbps/pin with 180 mV· 690 ps passing eye-windows on the channel over 1.8 V supply voltages.
more