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Fabrication and characterization of porous segments embedded in silicon nanowire devices

초록/요약

As technology evolves, circuits require more density than in the past. So, devices are required for more small than in the past. Also, electronic circuits triggered by photon have been long standing goal of photonics. Recent research, the optical transistors that photons are controlled by other photons or phototransistor with the gate response are reported [1, 2]. However, Research on devices in which the electron current is optically switched and amplified without an electrical gate is rare. In this paper, we research that nanowire (NW) device for photon-triggered and minimized device. Using the photon-triggered nanowire device, we show nanowire field effect transistor and logic-gate. The porous segments embedded in silicon nanowire is synthesized by metal assisted chemical etching and electrode etching. The structure of nanowire is formed long crystal silicon (CSi) segments connected by porous silicon (PSi) segments. In a fabricated process, the electrical contacts on both ends of the NW is made in aligned electron beam lithography. The PSi segment in Si NW was positioned between electrical contacts. When the PSi segment in Si NW is exposed to light, the current is triggered with a high on / off ratio of > 8 × 106. We analyzed the theoretical principle that the PSi segment embedded in a Si NW operates through modeling. A device containing two PSi segments along the NW can be triggered using two independent optical input signals. Demonstrates light-triggered logic gates, including AND, OR, and NAND gates, using localized pump lasers.

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목차

Abstract i
Contents iii
List of figures iv
1. Introduction 1
1.1 Synthesize of NWs 1
1.2 Nanowire field effect transistor (FET) 6
2. Experimental results and optical setup 8
2.1 Fabrication of photon-triggered nanowire transistors 8
2.2 Optical setup for PTNT 14
3. Results and Discussion 16
3.1 Current-voltage (I-V) curve for PTNTs 16
3.2 Spatial dependence of PTNTs 28
3.3 Temporal response of the PTNTs 30
3.4 Logic gate of PTNTs 32
4. Summary 34
5. Reference 35

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