Mosaic-CNN: A Two-Step Zero Prediction Approach for Energy Efficient Convolutional Neural Network
- 주제(키워드) Energy Efficient Convolutional Neural Network
- 발행기관 고려대학교 대학원
- 지도교수 박종선
- 발행년도 2018
- 학위수여년월 2018. 2
- 학위구분 석사
- 학과 대학원 전기전자공학과
- 원문페이지 45 p
- 실제URI http://www.dcollection.net/handler/korea/000000080709
- 본문언어 영어
- 제출원본 000045932519
초록/요약
In convolutional neural network (CNN), convolution operations of convolutional(Conv) layers consume dominant portion of computation energy due to large amount of multiply and accumulate (MAC) operations. However, when the results of convolution operations are negative, those MAC operations become meaningless after rectified linear unit (ReLU) function. In this paper, we present an energy efficient approach to predict and skip the convolution operations generating meaningless outputs. A two-step zero prediction approach, called Mosaic CNN, have been proposed, where the output feature maps (Ofmaps) of each Conv layer are computed considering their spatial surroundings. Mosaic-CNN: A Two-Step Zero Prediction Approach for Energy Efficient Convolutional Neural Network. In order to further save the computation energy, we also propose a novel zero prediction scheme, where a constant value representing least significant bit parts (LSBs) compensates most significant bit parts (MSBs) computations. The CNN accelerator supporting the proposed approach has been implemented using 65 nm CMOS process. The numerical results show that the proposed CNN accelerator achieves 30.5% and 33.01% of energy savings for AlexNet and VGG-16, respectively, compared to state-of-the-art architecture.
more목차
List of Figures
List of Tables
Abstract
1. Introduction
2. Background and Observations
2.1 Convolutional Neural Network
2.2 Density and Locations of Zero Pixels in Ofmaps
3. The proposed two-step zero prediction approach
3.1 Two-step Process and Mosaic Types
3.2 TensorFlow Simulation Results
3.3 Zero Prediction with Judicious LSB Compensations
3.4 Combined Approach
4. The Proposed Hardware Architecture
4.1 The Overall Architecture
4.2 The Detail Architecture
4.3 Two-step Approach Implementation
5. Hardware Implementation and Numerical Results
6. Conclusion
LIST OF REFERENCES
